Von Neumann Architecture

The term Von Neumann Architecture, derives from a computer architecture proposal by the mathematician and early computer scientist John Von Neumann and others, dated June 30, 1945, entitled First Draft of a Report on the EDVAC. This describes a design architecture for an Electronic Digital Computer with subdivisions of a processing unit consisting of an arithmetic logic unit and processor registers, a control unit containing an instruction register and program counter, a memory to store both data and instructions, external mass storage, and input and output mechanisms. The meaning of the term has evolved to mean a stored-program computer in which an instruction fetch and a data operation cannot occur at the same time because they share a common bus. This is referred to as the Von Neumann bottleneck and often limits the performance of the system.

JOHN VON NEUMANN: THE FATHER OF THE MODERN COMPUTER

The heart of the Von Neumann Computer Architecture is the Central Processing Unit (CPU), consisting of the control unit and the ALU (Arithmetic and Logic Unit). The CPU interacts with a memory and an input/output (I/O) subsystem and executes a stream of instructions (the computer program) that process the data stored in memory and perform I/O operations. The key concept of the Von Neumann Architecture is that data and instructions are stored in the memory system in exactly the same way. Thus, the memory content is defined entirely by how it is interpreted. This is essential, for example, for a program compiler that translates a user-understandable programming language into the instruction stream understood by the machine. The output of the compiler is ordinary data. However, these data can then be executed by the CPU as instructions. A variety of instructions can be executed for moving and modifying data, and for controlling which instructions to execute next. The collection of instructions is called the instruction set, and, together with the resources needed for their execution, the instruction set architecture (ISA). The instruction execution is driven by a periodic clock signal. Although several sub steps have to be performed for the execution of each instruction, sophisticated CPU implementation technologies exist that can overlap these steps such that, ideally, one instruction can be executed per clock cycle. Clock rates of today's processors are in the range of 200 to 300 MHz allowing up to 600 million basic operations (such as adding two numbers or copying a data item to a storage location) to be performed per second.

With the continuing progress in technology, CPU speeds have increased rapidly. As a result, the limiting factors for the overall speed of a computer system are the much slower I/O operations and the memory system since the speed of these components have improved at a slower rate than CPU technology. Caches are an important means for improving the average speed of memory systems by keeping the most frequently used data in a fast memory that is close to the processor. Another factor hampering CPU speed increases is the inherently sequential nature of the Von Neumann instruction execution. Methods of executing several instructions simultaneously are being developed in the form of parallel processing architectures.

The design of Von Neumann Architecture is simpler than the more modern Harvard Architecture which is also a stored-program system but has one dedicated address and data buses for memory, and another set of address and data buses for fetching instructions.

A stored-program digital computer is one that keeps its programmed instructions, as well as its data, in read-write, random-access memory (RAM). Stored-program computers were advancement over the program-controlled computers of the 1940s, such as the Colossus and the ENIAC, which were programmed by setting switches and inserting patch leads to route data and to control signals between various functional units. In the vast majority of modern computers, the same memory is used for both data and program instructions.

The von Neumann Computer Model

Von Neumann Computer Systems contain three main building blocks:

1. Central processing unit (CPU)
2. Memory
3. Input/output devices (I/O)

These three components are connected together using the System Bus.

The most prominent items within the CPU are the registers. They can be manipulated directly by a computer program.

Components of the Von Neumann Model

1. Memory: Storage of information (data/program)
2. Processing Unit: Computation/Processing of Information
3. Input: Means of getting information into the computer. e.g. keyboard, mouse
4. Output: Means of getting information out of the computer. e.g. printer, monitor
5. Control Unit: Makes sure that all the other parts perform their tasks correctly and at the correct time

Communication between Memory and Processing Unit

Communication between memory and processing unit consists of two registers:

1. Memory Address Register (MAR)
2. Memory Data Register (MDR)

To read

1. The address of the location is put in MAR.
2. The memory is enabled for a read.
3. The value is put in MDR by the memory.

To write

1. The address of the location is put in MAR.
2. The data is put in MDR.
3. The Write Enable signal is asserted.
4. The value in MDR is written to the location specified.

Memory Operations

There are two key operations on memory:

1. Fetch (address) returns value without changing the value stored at that address.
2. Store (address, value) writes new value into the cell at the given address.

This type of memory is random-access, meaning that CPU can access any value of the array at any time (vs. sequential access, like on a tape). Such memories are called RAM (random-access memory). Some memory is non-volatile, or read-only (ROM or read-only memory).

ALU, the Processing Unit

• Processing unit is hardware that implements Arithmetic and Logical Operations.
• ALU stands for Arithmetic and Logic Unit, capable of performing ADD, SUBTRACT, AND, OR, and NOT Operations.
• The size of input quantities of ALU is often referred to as word length of the computer.
• Many processors today have word length of 32 and 64 bit.
• Processing unit also includes a set of registers for temporary storage of data and memory addressing.

Control Unit

• Manages the Processing Unit
• Implemented as FSM
• FSM directs all activity
• Clock-based step-by-step processing, cycle-by-cycle
• FSM is controlled by the

1. Clock signal
2. Instruction Register
3. Reset signal

Input/output

• I/O controller provides the necessary interface to I/O devices
• Takes care of low-level, device-dependent details
• Provides necessary electrical signal interface

Types of Von Neumann Computers Today

Today, the Von Neumann Scheme is the basic architecture of most computers appearing in many forms, including supercomputers, workstations, personal computers, and laptops.

Disadvantages of Von Neumann architecture

• Every piece of data and instructions has to pass across the data bus in order to move from main memory into CPU (and back again). This is a problem because the data bus is a lot slower than the rate at which the CPU can carry out instructions. This is called the “Von Neumann Bottleneck”.
• Both the data and programs share the same memory space.
• This is a problem because it is quite easy foe a poorly written or faulty piece of code to write data into an area holding other instructions, so trashing that program.
• The rate at which data needs to be fetched and the rate at which instructions need to be fetched are often very different. And yet they share the same bottlenecked data bus.

Conclusion

The Von Neumann Architecture has been incredibly successful, with most modern computers following the idea. You will find the CPU chip of a personal computer holding a control unit and the arithmetic logic unit (along with some local memory) and the main memory is in the form of RAM sticks located on the motherboard.
But the there are some basic problems with it. And because of these problems, other architectures have been developed.